Physical Verification, Integration and sign off engineer

Design Enablement team at India, is part of Intel Foundry, having charter to develop methodology for advance process nodes, providing opportunity, to be among the first one to work on latest technology.

This role, in Design enablement, is for individual technical contributor for physical sign off tools, flow and methodologies and candidate will be expected to drive and influence methodologies for Fill and Physical sign off flow like DRC, LVS, Antenna and Density.

This role give opportunity to define and drive physical design guidelines and methodologies including block integration and tape-in methodologies. You will be expected to provide necessary data in making decisions on tools and methodologies of choice in the associated domains on leading edge process nodes.

Candidate will be enabling and validating physical sign off flow through rigorous testing by developing creative and innovative testcases to avoid any escapes in flow for leading edge process nodes.

The role will give opportunity to work on newest of technology and work with key stakeholders in technology, Design, Central CAD, and Local CAD teams to drive next generation tools and codevelop methodologies, closely working with both external and internal vendors. Role also needs creative thinking to find corner cases, workarounds, and ways to create self-service troubleshooting.

Qualifications

Candidate should have 4+ years of relevant experience, with masters in VLSI/ Microelectronics/Electronics engineering and have worked on industry standard tools for Physical sign off (DRC, LVS, Density, Antenna etc.)

Candidate should be well versed with various options to optimize flow in terms of quality and resources.

Candidate should have good understanding of rule file/ tech files for these flows.

You should have good knowledge of semiconductor physics, process technology, EDA tools and associated challenges for advance technology.

Candidate should have good scripting skill for automation, like TCL, Perl or Python.

Understanding of fabrication and process technology will be added advantage

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.

Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore?s Law to bring smart, connected devices to every person on Earth.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.

Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

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Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Job posting details (such as work model, location or time type) are subject to change.