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Hireio, Inc.

IP Design Verification Engineer

San Jose, CA, USA

33 Days ago

Job Overview


Posted Date: 14 August 2025

Job Type: Full Time

Workplace Type: Not Specified

Experience Level: Not Specified

Salary: Competitive & Based on Experience

Experience: 0 - 0 yrs

Job Description


About the team:

This team is at the forefront of technological innovation, specializing in the design, development, and production of CPUs for our data center servers. Leveraging a team of highly skilled engineers, researchers, and experts, the unit focuses on creating high-performance, energy-efficient, and reliable chips that power a wide range of electronic devices and systems.

Responsibilities

Develop UVM based test bench

Develop simulation methodology for automated and re-usable environments.

Define and execute test plan towards coverage target

Support performance verification, power-aware simulation, RTL/FW co-simulation, and GTL simulation.

Debugging regression failures

Improve and refine verification process

Requirements

Minimum Qualifications:

Bachelor of Science in Computer Science, Electrical Engineering, or related fields

Industry experience as Design Verification Engineer

Preferred Qualifications:

In-depth knowledge of UVM, System Verilog, Makefile, Perl, Python, and C/C++

In-depth knowledge of AMBA CHI-E, ACE-lite 4/5 protocols, SMMU, IO Coherency, and Scheduler

Experience with chip interlinking protocols like UCIe, CXL and CCIX

Autonomous, result-oriented, milestone-driven, and a thorough approach to work

Proven ability to work well in a team

Have skills: NVMe, SR-IOV, S-IOV, and Compression algorithm


Key skill Required

  • Perl
  • Python
  • Algorithm
  • Computer Science
  • Design
  • Development
  • Electrical Engineering
  • Highly Skilled
  • Innovation
  • Methodology
  • Performance Verification
  • Proven Ability
  • Regression
  • Science
  • Technological Innovation
  • Verilog


Company Details


Company Name: Hireio, Inc.

Recruiting People: HR Department

Contact Number: --

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